һ FPGA ҕl/DIJɼ@ʾ͂ݔ
1. ӲOӋ
1.1 LCDӿ
1.2 AD/DAӿ
1.3 l
1.4
W
1.5
1.6 ps2ӿ
1.7 VGA
1.8 ҕlݔݔ
2VerilogaOӋ
2.1 LCDr
2.2 ҕlɼ̎
2.3 WverilogOӋ
2.4 lVerilogOӋ
2.5 VGA verilogOӋ
3.
ҕl/Dɼ
ڶ ҕl/DFPGA_l
1. ǰ漼
2. 漼
3. SignalTapII߉xʹü
Sopcgҕl/D̎еđ
1. SOPCĽMɼOӋ˼
2. SOPC_lߵʹ
3. \SOPCMЈD̎ܛӲ_lOӋ
3.1 \SOPCMЈD̎ܛCPUOӋ
3.2 \SOPCMЈD̎ӲOӋ
3.3 \SOPCMЈD̎OӋ
IJ H.264ҕl̎ FPGA OӋՓc`
1. H.264˜ʌWcо
1.1 \ӈD̎Ļg
1.2 H.264ܽY
2. H.264ЈDA̎De-interlace HDLOӋ`
2.1 FIRVԭ
2.2 De-interlaceֵ̎verilogaFc{ԇ
3. H.264ЈDAֵ̎V HDL OӋ`
3.1 DA̎еĸ˹̎ԭ
3.2 3X3ֵV̎verilogFc
岿 MPEG-4ҕl̎ FPGA OӋՓc`
1. MPEG-4˜ʌWcо
1.1 \ӈD̎Ļg
1.2 MPEG-4ܽY
2. MPEG-4ЈDA̎OӋ`
3. MPEG-4̎verilogFc
JPEG2000
FPGAOӋՓc`
1. JPEG˜ʸ
1.1 DgA
1.2 YUVcRGBą^e
1.3 JPEG˜ʿ
2. JPEG DCTģKc`
2.1 ֮֒ԭcF
2.2 8X8׃Qԭ
2.3 DCT׃QČFc{ԇ
3. JPEG ģKc`
3.1 úԭ
3.2 ϵ̎͑
3.3 \ČF
4. JPEG ؾaģKc`
4.1 Huffmanaԭ
4.2 HuffmanaverilogFc
5. JPEG wOӋc
5.1 JPEG2000averilogwFc
5.2 OӋdcchipscope{ԇ
߲ ҕl/D̎㷨OӋՓc`
1. ҕl/Dɫ̎
2. ҕl/Dֵ׃Q̎
3. ҕl/Dڰֵ̎
4. ҕl/DҶ̎
5. ҕl/DV̎
ڰ˲ SDIOӋՓc`
1. SDIԭ
2. SDIOӋ_l
ھŲ ҕl/D̎WjݔĿ
1OӋҕlDɼ̎Wjݔl̎
2ӲOӋW LCDҕllڵ
3ܛOӋ
ʮ aFPGAOӋĿ
1OӋFһaĹѭhňDƬͨ^|Oٶȣ
Է醴SDеƬ
2ӲOӋLCD,|SDӿڵ
3ܛOӋLCD|SDӣJPEGDaĻ昋̈́
һҕl/DɼLCD@ʾ
a
ҕl/Dɼ̎;Wjݔ
ģH.264sa
壺JPEG2000
FPGA a
MPEG-4ҕlsa
ߣҕl/Dɫ̎팍
ˣ ҕl/Dֵ׃Q̎팍
ţ ҕl/Dڰֵ̎팍
ʮ ҕl/DҶ̎팍